WSC 2007 Final Abstracts

Semiconductor Manufacturing Track

Tuesday 1:30:00 PM 3:00:00 PM
Modeling and Analysis of Semiconductor Manufacturing

Chair: John Fowler (Arizona State University)

Improved Simple Simulation Models for Semiconductor Wafer Factories
Oliver Rose (Dresden University of Technology)

Semiconductor wafer fabrication facilities (wafer fabs) are among the most complex production facilities. A large product variety, hundreds of processing steps per product, hundreds of machines of different types, and automated transport lead to a system complexity which is hard to understand and hard to handle. For educating planners and developing adequate material flow control mechanisms, simple models for this complex environment are required. Several years ago, we published some first approaches which were useful to explain the fab behavior after a serious bottleneck breakdown. With that simple model, however, it was only possible to predict the cycle time distribution of the lots for a few scenarios. In this paper, we present some model improvements which lead to a rather good cycle time prediction for a variety of load situations.

Simulation Framework for Complex Manufacturing Systems with Automated Material Handling
Rene Driessel and Lars Moench (University of Hagen)

In this paper, we suggest a framework that allows for the simulation-based performance assessment of complex manufacturing systems with Automated Material Handling Systems (AMHS). Therefore, we consider a coupling architecture that connects simulation models of the manufac-turing base system and the AMHS with a shop-floor control system. The center point of this architecture is a blackboard-type data layer between the shop-floor control system and the two simulation engines. We provide detailed information on how the different subsystems communicate and how each system triggers events of the other systems. We show by means of a case study how this framework supports the required performance assessment.

Using Quantiles in Ranking and Selection Procedures
Jennifer M. Bekki, John W. Fowler, and Gerald T. Mackulak (Arizona State University) and Barry L. Nelson (Northwestern University)

A useful performance measure on which to compare manufacturing systems is a quantile of the cycle time distribution. Unfortunately, aside from order statistic estimates, which can require significant data storage, the distribution of quantile estimates has not been shown to be normally distributed, violating a common assumption amongst ranking-and-selection (R&S) procedures. To address this, we provide empirical evidence supporting an approach using the mean of a group of quantile estimates as the comparison measure. The approach is detailed and illustrated through experimentation on four M/M/1 queues in which the 0.9 cycle-time quantile is the performance measure. Results in terms of simulation effort and accuracy are reported and compared to results obtained using the macro-replications approach for inducing normality as well as to results obtained by applying R&S procedures to quantile estimates directly. The suggested procedure is shown to provide significant savings in simulation effort while sacrificing very little in accuracy.

Tuesday 3:30:00 PM 5:00:00 PM
Semiconductor Manufacturing Performance Improvement

Chair: Lars Moench (Technical University of Ilmenau)

Application of Combined Discrete-event Simulation and Optimization Models in Semiconductor Enterprise Manufacturing Systems
Gary Godding and Hessam Sarjoughian (Arizona State University) and Karl Kempf (Intel Corporation)

It is a common practice to use simulation for validating different types of control and planning algorithms. However, the science of how to rigorously integrate simulation and decision models is not well understood and becomes critically important as the complexity and scale of these models increase. In our research, we have developed a methodology for integrating different types of models using a Knowledge Interchange Broker (KIB). In this paper we describe a supply-chain semiconductor application where the KIB has been used as an integral part of developing and deploying a commercial Model Predictive Control model for use in operating a multi-billion dollar supply chain. The simulation based experiments facilitated developing and validating the controller design and data automation for a real-world semiconductor manufacturing system.

Simulation Experimental Investigation on Job Release Control in Semiconductor Wafer Fabrication
Chao Qi (Singapore-MIT Alliance), Appa Iyer Sivakumar (School of Mechanical and Aerospace Engineering) and Stanley B. Gershwin (Massachusetts Institute of Technology)

This paper presents a new job release methodology, WIPLOAD Control, especially in semiconductor wafer fabrication environment. The performance of the proposed methodology is evaluated in a simulation study on a simplified wafer fabrication model, in comparison with other existing release control methodologies. A case study is also conducted by simulating a real-life wafer fabrication facility. Based on the experimental results, it appears that WIPLOAD Control is a reliable job release methodology, which can efficiently reduce average cycle time and standard deviation of cycle time for a given throughput level, especially with the increase of system congestion level and system variability caused by stochastic events such as machine unreliability or processing time variability.

Sensitivity Analysis on Causal Events of WIP Bubbles by a Log-driven Simulator
Ryo Hirade, Rudy Raymond, and Hiroyuki Okano (IBM Research)

Fluctuations of work-in-progress (WIP) levels cause variability of cycle time and often lead to productivity losses in semiconductor wafer fabrication plants. To identify sources of such variability, we are developing a root cause analysis tool with history logs of operational events, such as high WIP or equipment downtime, as inputs to automatically find the chains of events that create the variability. In the root cause analysis, one of the key steps is to aggregate the observed events into groups that are likely in cause-effect relationships. For operational events that involve time lags in cause-effect relationships, grouping the events requires identification of the time windows of causality based on discrete event simulations. This paper describes a design and implementation of a simulator for this purpose. The simulator does not assume any statistical or mathematical model, and thus is simple to maintain.

Wednesday 8:30:00 AM 10:00:00 AM
Semiconductor Manufacturing Equipment Modeling

Chair: Nirmal Govind (Intel Corporation)

Predicting Cluster Tool Behavior with Slow Down Factors
Robert Unbehaun and Oliver Rose (Dresden University of Technology)

Cluster tools are representatives of a special kind of tool where process times of jobs depend on the combination in which they are processed together on the tool and hence, depending on the sequence in which they are processed at a tool. To evaluate schedules of jobs to be processed at such a tool an estimation method is needed since a detailed simulation takes too long. In this paper, we present a method based on slow down factors which produces promising results and gives hints for the development of intelligent scheduling methods for this kind of tools.

An Analysis of Tool Capabilities in the Photolithography Area of an Asic Fab
P. J. Byrne, Cathal Heavey, and Kamil Erkan Kabak (University of Limerick)

Photolithography is generally regarded as the most constraining element in semiconductor manufacturing. This is primarily attributable to the high capital investment and extensive reentrant flows throughout this section. Cycle time management in this area is crucial to balance the trade off between tool utilization and cycle time. In a low volume, high product mix fab the inclusion of tool capabilities, and their status, can significantly affect tool utilization and overall cycle times. In this paper a simulation model is developed to aid cycle time decision making policies in the photolithography section of a low volume, high product mix fab. The objective of the study is to determine the optimum course of action, for varying levels of expected increased demand, while maintaining acceptable cycle times and minimizing total capital spent in photolithography. The actions reviewed include the increased use of capabilities where available, followed by the purchase of new photolithography equipment.

Simulation Results and Formalism for Global-local Scheduling in Semiconductor Manufacturing Facilities
Mickael Bureau, Stephane Dauzere-Peres, and Claude Yugma (Ecoles des Mines de Saint-Etienne) and Leon Vermarien and Jean-Bernard Maria (STMicroelectronics)

This article deals with an approach for managing scheduling in semiconductor manufacturing facilities. The proposed approach ensures consistency between global and local scheduling decisions, by ensuring that global objectives are met through dynamic adaptation of the local behavior. This approach is validated by simulation. After describing the context and the framework of the approach, we introduce the formalism and present first simulation results obtained on real data of the fab of STMicroelectronics, Rousset. The experimental tests are promising since substantial improvements are obtained on criteria such as cycle time, number of completed lots, etc.

Wednesday 10:30:00 AM 12:00:00 PM
AMHS Modeling Approaches and Distributed Simulation

Chair: Theresa Roeder (San Francisco State University)

Hierarchical Distributed Simulation for 300mm Wafer Fab
Sheng Xu and Leon F. McGinnis (Georgia Institute of Technology)

Distributed simulation promises benefits in large-scale simulations, such as in high fidelity simulation of 300mm wafer fabs, although these benefits have been hard to achieve in practice. This paper examines the fundamentals of distributed simulation, and proposes a hierarchical approach to distributed wafer fab simulation, which has the potential to achieve significant reduction in model execution time.

Survey of Research in Modeling Conveyor-based Automated Material
Dima Nazzal and Ahmed El-Nashar (University of Central Florida)

Automated material handling systems (AMHS) play a central role in modern wafer fabrication facilities (fabs). Typically, AMHS used in wafer fabs are based on discrete vehicle-based overhead systems such as overhead hoisted vehicles. Conveyor-based continuous flow trans-port (CFT) implementations are starting to gain support with the expectations that CFT systems will be capable of handling high-volume manufacturing transport requirements. This paper discusses literature related to models of conveyor systems in semiconductor fabs. A comprehensive overview of simulation-based models is provided. We also identify and discuss specific research problems and needs in the design and control of closed-loop conveyors. It is concluded that new analytical and simulation models of conveyor systems need to be developed to understand the behavior of such systems and bridge the gap between theoretical research and industry problems.

Reusable Tool for 300mm Intrabay Amhs Modeling and Simulation
Ahmed El-Nashar (University of Central Florida) and Khaled S. El-Kilany (Arab Academy for Science and Technology)

The transition to 300mm wafer size introduced a lot of new technologies to wafer fabrication facilities that mandated the presence of intrabay automated material handling systems (AMHS) for moving wafer carriers between the stockers and production tools within a bay. The design of intrabay AMHS depends on the configuration and the mode of delivery. A generic reusable tool is developed for modeling and simulation of the 300mm intrabay AMHS different designs. The tool relies on a built-in database and a library containing the different components of intrabay AMHS and the different processing tools. The design of the generic tool guarantees its reusability for building different models of bays with virtually any design. The tool output includes a number of AMHS performance metrics that can be used effectively in comparing different designs of an intrabay AMHS.

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